Our hardware designers had a brilliant idea: "Why not add an XMOS chip?" Once there were custom chips; for the AmigaOne X generation, we have customisable chips. XMOS calls it "Software Defined Silicon", we call it 'Xena', a nod to the old custom chip names. It's the inheritor of the 'transputer' concept, and it's something we're quite excited about.
Capable of eight concurrent real-time threads with shared memory space, at up to 500 MIPS, Xena gives the X1000 a very flexible, very expandable co-processor. The uses are endless; control hardware, DSP functions, robotics, display - even SID chip and console emulators
Xena is not simply strap-on extra adding an extra half GHz of processing power, it's a different kind of thing to a general purpose CPU altogether. It's an event-driven processor, which means it can respond immediately to events such as external signals, rather than having to wait on an interrupt. This makes it appropriate to true real-time functions. It has many input/output lines which are software configurable, making it ideal for ultra-low latency data sampling applications and extremely easy to turn into control hardware for... well, virtually anything. The I/O can also be configured to communicate with extra XMOS chips that can run the processor's code in a highly parallel fashion, and for serious power applications you can just keep on adding processors.
The Amiga has seen some truly ingenious hacks and add-ons; Xena can take this to a whole new level. It will take a while for the full possibilities to be realised, but we urge you to visit XMOS and discover more for yourselves.
Xorro - connecting Xena to the world
To accompany 'Xena', we have 'Xorro', a new slot using an industry-standard PCIe x8 form factor to give access to the 'Xena' IO. This will be the route to Xena's IO lines, which are dynamically configurable as input, output, or bidirectional. 'Xorro' will allow bridging Xena to external hardware for control purposes, to internal systems, or to other Xcore processors.
Xena has 64 of these configurable I/O lines. In the AmigaOne X1000 we have one quarter of these connected to the CPU local bus for direct communication with the system, whilst the other three-quarters are connected directly to pins on the Xorro slot for communication with the outside world. JTAG connection for control and debugging of the XMOS silicon is accessible both through the CPU's GPIO (General Purpose Input/Output) lines and the Xorro interface.
Hardware designed for the Xorro slot may be as simple as a few traces running from the slot lanes to an external connector with minimal or no voltage/level control. This is the kind of arrangement you'd expect for a board designed to use Xena for hardware control applications, where all the control logic is performed in software by Xena rather than in non-reusable custom ASIC hardware on the board, or using tricky programmable logic via an FPGA or similar. A more complicated board might include some hardware to deal with Xena's output - drivers for an IR transceiver for computer controlled RC applications, or pre-amp circuitry for networked audio.
For really serious applications, you might have a Xorro board with an array of additional XMOS chips on, connected together to allow highly multi-threaded applications to run in parallel, in a similar fashion to the famous Transputer concept, the predecessor of the XMOS technology. Reference designs have been made with 256 cores, offering a theoretical processing power of over 100,000 MIPS.